HP/Agilent E2443B Analysis Probe for the Intel Pentium 510/60 MHz and 567/66 MHz

The Pentium analysis probe (formerly known as a preprocessor) has four modes of operations. In the state-per-transfer mode, the logic analyzer is clocked upon completing data transfer cycles. In this mode, the analysis probe keeps track of the address pipeline and aligns data with its parent address. Additionally, activity during an HLDA or BOFF# assertion is captured. In the state-per-clock mode, data is captured on every system clock, so you see all processor activity including wait and idle states. This mode of operation is useful in finding memory locations that do not respond with data and in checking memory control systems. In the timing analysis mode, all signals are buffered, but otherwise pass straight through to the logic analyzer. The debugger mode is identical to state-per-transfer mode, except that whenever IU, IV or IBT are asserted, data is captured regardless of whether or not it is valid.